Design of a low-current shunt-feedback transimpedance amplifier with inherent loop-stability

In this paper we propose a new architecture for enhancing the performance of a transimpedance amplifier used for low-currents, and in particular, that used in biosensing. It is usually the first block in biomedical acquisition systems for converting a current in the nanoampere and picoampere range into a proportional voltage, with an amplitude suitable for further processing. There exist two main amplifier topologies for achieving this, current-mode and shunt-feedback mode. This paper introduces a shunt-feedback amplifier that embodies current-mode operation and thereby offers the advantages of both existing schemes. A conventional shunt-feedback amplifier has a number of stages and requires compensation components to achieve stability of the feedback loop. The exemplary circuit described is inherently stable because a high gain is effectively achieved in one stage that has a dominant pole controlling the frequency response. Exhibiting complementary symmetry, the configuration has an input port that is very close to earth potential. This enables the configuration to handle bidirectional input signals such are as met with in electrochemical ampero-metric biosensors. For the 0.35 µm process adopted and ± 3.3 V rail supplies, the power dissipation is 330 µW. With a transimpedance gain of 120 dBΩ the incremental input and output resistances are less than 2 Ω and the − 3 dB bandwidth for non-optical input currents is 8.2 MHz. The input referred noise current is 3.5 pA/√Hz

A VGA linearity improvement technique for ECG analog front-end in 65nm CMOS

This paper presents a 65nm CMOS low-power, highly linear variable gain amplifier (VGA) suitable for biomedical applications. Typical biological signal amplitudes are in the 0.5-100mV range, and therefore require circuits with a wide dynamic range. Existing VGA architectures mostly exhibit a poor linearity, due to very low local feedback loopgain. A technique to increase the loop-gain has been explored by adding additional feedback to the tail current source of the input differential pair. Stability analysis of the proposed technique was undertaken with pole-zero analysis. A prototype of Analog Front End (AFE) has been designed to provide 25-50dB gain, and post-layout simulations showed a 15dB reduction in the harmonic distortion for 20mV pk-pk input signal compared to the conventional architecture. The circuit occupies 3,108μm2 silicon area and consumes 0.43μA from a 1.2V power supply

A positive feedback-based op-amp gain enhancement technique for high precision applications

A power-efficient, voltage gain enhancement technique for op-amps has been described. The proposed technique is robust against Process, Voltage, and Temperature (PVT) variations. It exploits a positive feedback-based gain enhancement technique without any latch-up issue, as opposed to previously proposed conductance cancellation techniques. In the proposed technique, four additional transconductance-stages (gm stages) are used to boost the gain of the main gm stage. The additional gm stages do not significantly increase the power dissipation. A prototype was designed in 65nm CMOS technology. It results in 81dB voltage gain, which is 21dB higher than the existing gainboosting technique. The proposed opamp works with as low a power supply as 0.8V, without compromising the performance, whereas the traditional gain-enhancement techniques start losing gain below a 1.1V supply. The circuit draws a total static current of 295μA and occupies 5000μm2 of silicon area

Sensor grid design for high resolution 3D acoustic measurements of musical instruments

[Paper presented at the Institute of Acoustics 2019 Conference, held in Milton Keynes, 13-14 May 2019.

Development of an Autonomous Battery Electric Vehicle

Autonomous vehicles have been shown to increase safety for drivers, passengers and pedestrians and can also be used to maximize traffic flow, thereby reducing emissions and congestion. At the same time, governments around the world are promoting the usage of Battery Electric Vehicles (BEVs) to reduce and control the emissions of CO2. This has made the development of autonomous vehicles and electric vehicles a very active research area and has prompted a significant amount of government funding. This paper presents the detailed design of a low-cost platform for the development of an autonomous electric vehicle. In particular, it focuses on the design of the electrical architecture and the control strategy, tailored around the usage of affordable sensors and actuators. The specifications of the components are extensively discussed in relation to the performance target. The aim is to provide a comprehensive guide for the development of the remotely controlled platform, in order to lower the entry barrier for the development of autonomous electric vehicles

A high sensitivity and low power circuit for the measurement of abnormal blood cell levels

This paper describes a technique to detect blood cell levels based on the time-period modulation of a relaxation oscillator loaded with an Inter Digitated Capacitor (IDC). A digital readout circuit has been proposed to measure the time-period difference between the two oscillators loaded with samples of healthy and (potentially) unhealthy blood. A prototype circuit was designed in 65nm CMOS technology and post-layout simulations shows 15.25aF sensitivity. The total circuit occupies 2184µm2 silicon area and consumes 216µA from a 1V power supply

An analysis of vehicle-to-infrastructure communications for non-signalised intersection control under mixed driving behaviour

Intersection control has an important role in the management of urban traffic to ensure safety, high traffic flow and to prevent congestion. Recently, a growing body of literature has been reported on the theme of non-signalised intersection control in which traffic lights are replaced with intelligent road side units. Data from several studies suggest that non-signalised control could reduce vehicle delays and fuel consumption significantly whilst ensuring safety. However, there is little published data on the impact of the mixed driving behaviour with human-driven vehicles and autonomous vehicles. This paper investigates the emerging role of connectivity and vehicle autonomy in the context of traffic control under the mixed driving behaviour scenario. The concepts of vehicle-to-infrastructure (V2I) communications and multi-agent systems are central to achieving a robust and reliable traffic-light-free intersection control. Comprehensive computer simulation results on a four-way intersection indicate over 96% reduced average vehicle delay and 37% less fuel consumption with the non-signalised control solution compared to the traffic light control. The outcome of this study offers some important insights into enabling cooperation between vehicles and traffic infrastructure via V2I communications, in order to make more efficient real-time decisions about traffic conditions, whilst ensuring a higher degree of safety

A 0.82V supply and 23.4 ppm/0C current mirror assisted bandgap reference

Traditional BGR circuits require a 1.05V supply due to the VBE of the BJT. Deep submicron CMOS technologies are limiting the supply voltage to less than 940mV. Hence there is a strong motivation to design them at lower supply voltages. The supply voltage limitation in conventional BGR is described qualitatively in this paper. Further, a current mirror-assisted technique has been proposed to enable BGR operational at 0.82V supply. A prototype was developed in 65nm TSMC CMOS technology and post-layout simulation results were performed. A self-bias opamp has been exploited to minimize the systematic offset. Proposed BGR targeted at 450mV works from 0.82-1.05V supply without having any degradation in the performance while keeping the integrated noise of 15.2µV and accuracy of 23.4ppm/0C. Further, the circuit consumes 21µW of power and occupies 73*32µm2 silicon area

A 261mV bandgap reference based on beta multiplier with 64ppm

In this paper, a low voltage bandgap reference circuit has been proposed. The introduction of a modified beta multiplier bias circuit decreased the mismatch caused by the PMOS transistors opamp contribution. By shifting the fixed resistors to the NMOSs drain side, the beta multiplier bias was able to minimise threshold mismatch between the two NMOS transistors. A 200-point MC simulation showed 0.9mV standard deviation, with a 0.34% accuracy. The simulated temperature coefficient was 64ppm/0C. The proposed circuit consumed 5.04µW of power from a 0.45V power supply voltage. A prototype was implemented in 65nm CMOS technology occupying a 2888µm2 silicon area, with the nominal value of the reference at 261mV

A high value, linear and tunable CMOS pseudo resistor for bio-medical applications

A sub-threshold MOS based pseudo resistor featuring a very high value and ultra-low distortion is proposed. A band-pass neural amplifier with a very low high-pass cutoff frequency is designed, to demonstrate the linearity of the proposed resistor. A BJT less CTAT current generator has been introduced to minimize the temperature drift of the resistor and make tuning easier. The stand-alone resistor has achieved 0.5% better linearity and a 12% improved temperature coefficient over the existing architectures. A neural amplifier has been designed with the proposed resistor as a feedback element. It demonstrated 31dB mid-band gain and a lowpass cutoff frequency of 0.85Hz. The circuit operates from a 1V supply and draws 950nA current at room temperature